1. Field of the Invention
The present invention relates to a semiconductor memory write method.
2. Description of the Related Art
A NAND flash memory (e.g., an EEPROM) is known as an electrically programmable nonvolatile semiconductor memory. In the NAND flash memory, a memory cell array is formed by arranging, in a matrix, NAND cell units in which a plurality of nonvolatile memory cells are connected in series. Therefore, the NAND flash memory has the characteristic that the unit cell area is smaller than that of, e.g., a NOR flash memory, and this facilitates increasing the capacity (the degree of integration).
In the NAND flash memory, however, the word-line (WL) resistance and bit-line (BL) resistance tend to increase owing to the narrow-width effect as the generation advances. In a read operation, therefore, it is necessary to produce no voltage level difference between the proximal end (close to a row decoder) and the distal end (far from the row decoder) of the WL and between the proximal end (close to a sense amplifier) and the distal end (far from the sense amplifier) of the BL. This very prolongs the waiting time from the start of charging of the WL and BL. Also, in a write operation, the write pulse width must be sufficiently increased so as not to produce any write speed difference between the proximal end and distal end of the WL. In the NAND flash memory as described above, the degree of integration readily increases, but the read operation time and the write operation time (write time+verify read time) often prolong as the degree of integration increases.
For example, there is a NAND flash memory of a so-called rewrite type (see, e.g., Jpn. Pat. Appln. KOKAI Publication No. 2006-228394) in which in order to suppress the spread of the threshold (Vth) voltage distribution caused by the cell proximity effect, preliminary data write (also called rough write) is first performed at a temporary level slightly lower than a desired threshold voltage level, and then final data write (also called additional write) by which final data is rewritten at the desired threshold voltage (finish) level is performed. Since this NAND flash memory requires two write operations, the write operation time (write time+verify read time) very prolongs.